Please use this identifier to cite or link to this item:https://hdl.handle.net/20.500.12259/34352
Type of publication: Straipsnis / Article
Author(s): Wan, Kaiyu;Liu, Dawei;Guo, Yu;Ting, T. O.;Lim, Eng Gee;Ma, Jieming;Zhang, Nan;Lei, Chi-Un;Man, Ka Lok;Krilavičius, Tomas
Title: Specification and analysis of null convention logic (NCL) circuits using PAFSV
Is part of: IMECS 2014 : Engineers and computer scientists: proceedings of the international multiconference, 2014, March 12-14, Hong Kong. Vol. 2, p. 860-865
Date: 2014
Keywords: SystemVerilog;Formal semantics;Formal language;Null Convention Logic
ISBN: 9789881925336
Abstract: In this work, a process algebraic framework known as PAFSV is applied to the formal specication and analysis of IEEE 1800TM SystemVerilog design. The formal semantics of PAFSV is defined by means of deduction rules that associate a time transition system with a PAFSV process. In addition, a set of properties of PAFSV is defined for a notion of bisimilarity; and PAFSV may be regarded as the formal language of a significant subset of IEEE 1800TM SystemVerilog. The main aim of this paper is to demonstrate that PAFSV is effective and useful for the formal specification and analysis of IEEE 1800TM SystemVerilog design. To achieve the aim of this approach, we apply PAFSV to model and analyse classical circuits such as the Null Convention Logic (NCL) circuit.
Internet: https://eltalpykla.vdu.lt/1/34352
https://hdl.handle.net/20.500.12259/34352
Appears in Collections:3. Konferencijų medžiaga / Conference materials

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